A PCI bus simulation framework and some simulation results on PCI standard 2.1 latency limitations

Journal of Systems Architecture

Volumn 47, Issue 9, 2002, Pages 807-819

  Finkelstein, Ehud ^a   Weiss, Shlomo ^a  

^a TEL AVIV UNIVERSITY   (Israel)

Author keywords

Computer architecture; Computer buses; I O systems; PCI; Peripherals

Indexed keywords

COMPUTER SIMULATION; DATABASE SYSTEMS; EMBEDDED SYSTEMS; NETWORK PROTOCOLS; TELECOMMUNICATION TRAFFIC;

PERIPHERAL COMPONENT INTERCONNECTS (PCI);

COMPUTER PERIPHERAL EQUIPMENT;

EID: 0036497263     PISSN: 13837621     EISSN: None     Source Type: Journal    
DOI: 10.1016/S1383-7621(01)00033-9     Document Type: Article

References (25)

1. The Anatomy of a High Performance Microprocessor: A Systems Perspective
2. Microprocessor system buses: A case study
3. PCI System Architecture, third ed.
4. Inside the PCI local bus
5. Local buses poised to enter PC mainstream
6. Designing the MPC105 PCI bridge/memory controller
7. Implementation of PCI-based systems using programmable logic
8. Memory channel network for the PCI
9. High performance I/O design in the AlphaServer 4100 symmetric multiprocessing system
10. Extending PCI performance beyond the desktop
11. A low-cost memory architecture for PCI-based interactive ray casting
12. PCI-PipeRench and SWORDAPI: A system for stream-based reconfigurable computing
13. A PCI bus based correlation matrix memory and its application to k-NN classification
14. Sepia: Scalable 3D compositing using PCI pamette
15. Design and implementation of a high-speed ATM host interface controller
16. SONIC a plug-in architecture for video processing
17. Defining requirements for a standard simulation environment
18. The AlphaServer 8000 series: High-end server platform development
19. Characterizing computer performance with a single number