Characterizing substrate coupling in deep-submicron designs

IEEE Design and Test of Computers

Volumn 19, Issue 2, 2002, Pages 4-15

  Silveira, Luis Miguel ^a   Vargas, Nuno ^a  

^a UNIVERSITY OF LISBON   (Portugal)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CAPACITANCE; COMPUTER AIDED DESIGN; COMPUTER SIMULATION; CONSUMER ELECTRONICS; ELECTRIC CONDUCTIVITY; ELECTRIC RESISTANCE; INTEGRATED CIRCUIT TESTING; MATHEMATICAL MODELS; OSCILLATORS (ELECTRONIC); SEMICONDUCTOR DOPING; SUBSTRATES;

CONJUGATE GRADIENT ALGORITHM; DEEP SUBMICRON DESIGN; GAUSS-SEIDEL METHODS; GENERALIZED MINIMAL RESIDUAL ALGORITHM; NOISE COUPLING; RING OSCILLATORS;

INTEGRATED CIRCUIT LAYOUT;

EID: 0036494808     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.990437     Document Type: Article

References (10)

1. Experimental results and modeling techniques for substrate noise in mixed-signal integrated circuits
2. Modeling and analysis of substrate coupling in integrated circuits
3. Extraction of circuit models for substrate cross-talk
4. Verification techniques for substrate coupling and their application to mixed-signal IC design
5. Efficient techniques for accurate extraction and modeling of substrate coupling in mixed-signal IC's
6. Multilevel integral equation methods for the extraction of substrate coupling parameters in mixed-signal IC's
7. Addressing substrate coupling in mixed-mode IC's: Simulation and power distribution systems
8. Layin: Toward a global solution for parasitic coupling modeling and visualization
9. Multi-level adaptive solutions to boundary-value problems