Performance assessment of scaled strained-Si channel-on-insulator (SSOI) CMOS

IEEE International SOI Conference

Volumn , Issue , 2002, Pages 17-19

  Kim, Keunwoo ^a   Chuang, Ching Te ^a   Rim, Kern ^a   Joshi, Rajiv V ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CARRIER MOBILITY; COMPUTER SIMULATION; ENERGY DISSIPATION; ENERGY GAP; MOSFET DEVICES; SEMICONDUCTOR DOPING; SILICON ON INSULATOR TECHNOLOGY;

STRAINED SILICON DEVICES;

CMOS INTEGRATED CIRCUITS;

EID: 0036456607     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

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3. T. Mizuno, et al., Symp. on VLSI Tech., p. 106, 2002.
4. Y. Taur and T.H. Ning, Fundamentals of modern VLSI devices, NY: Cambridge Univ. Press, 1998.
5. K. Rim, et al., Symp. on VLSI Tech., p. 98, 2002.
6. T. Mizuno et al., IEDM Tech. Dig. p. 934, 1999.
7. L.-J. Huang, et al., Symp. on VLSI Tech., p. 57, 2001.
8. M. Yoshimi et al., IEEE Trans. Electron Device, p. 423, Mar. 1997.
9. M. Pelella and J.G. Fossum, IEEE Trans. Electron Device, p. 96, Jan. 2002.