Support for debugging in the alpha 21364 microprocessor

IEEE International Test Conference (TC)

Volumn , Issue , 2002, Pages 584-589

  Litt, Timothe ^a  

^a Alpha Development Group   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG DIFFERENTIAL ANALYZERS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER DEBUGGING; COMPUTER SIMULATION; ELECTRONICS PACKAGING; FLIP CHIP DEVICES; LOGIC CIRCUITS; LOGIC DESIGN;

ALPHA MICROPROCESSOR; MEMORY CONTROLLER; ON-CHIP LOGIC ANALYZER;

MICROPROCESSOR CHIPS;

EID: 0036453074     PISSN: None     EISSN: None     Source Type: Journal    
DOI: 10.1109/TEST.2002.1041809     Document Type: Article

References (7)

1. "Testability Features of the Alpha 21364 Microprocessor", D. Bhavsar, R. Tan, S. Tomljenovic, S. Russel, D. Gowda, & P. Kovijanic; submitted to ITC 2002.
2. "Alpha 21364: A Scalable Single-chip SMP", P. Bannon, Microprocessor Forum 1998.
3. "A 1.2 GHz Alpha Microprocessor with 44.8 GB/sec of chip pin bandwidth", A. Jain, et al, International Solid-State Circuits Conference Digest of Technical Papers, February, 2001, Vol. 44, pp. 240.
4. "Ev7", P. Bannon, Microprocessor Forum 2001.
5. "Alpha 21364: A Single-Chip Shared Memory Multiprocessor," Peter Bannon, Brian Lilly, David Asher, Maurice Steinman, David Webb, Rishan Tan, and Timothe Litt, GOMAC 2001 Digest of Papers, March 2001, pp 334-337.
6. "The Alpha 21364 Network Architecture", S. Mukherjee, P. Bannon, S. Lang, A. Spink, D. Webb, Hot Interconnects 9, August 2001, p 113-118
7. "User Program Measurement in a Time-Shared Environment", CACM 1971, Volume 14 Number 10, pp 661-666, Nemeth and Rovner.