A 1.2GHz alpha microprocessor with 44.8GB/s chip pin bandwidth

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2001, Pages 240-241

  Jain, A ^a   Anderson, W ^a   Benninghoff, T ^a   Bertucci, D ^a   Braganza, M ^a   Burnette, J ^a   Chang, T ^a   Eble, J ^a   Faber, R ^a   Gowda, D ^a   Grodstein, J ^a   Hess, G ^a   Kowaleski, J ^a   Kumar, A ^a   Miller, B ^a   Mueller, R ^a   Paul, P ^a   Pickholtz, J ^a   Russell, S ^a   Shen, M ^a   Truex, T ^a   Vardharajan, A ^a   Xanthopoulos, D ^a   Zou, T ^a   more..

^a HEWLETT PACKARD COMPANY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CAPACITANCE; CMOS INTEGRATED CIRCUITS; COMPUTER AIDED MANUFACTURING; DATA STORAGE EQUIPMENT; DYNAMIC RANDOM ACCESS STORAGE; INDUCTANCE; TRANSISTORS;

CHIP DECOUPLING; INTER-PROCESSOR COMMUNICATION PORTS; LAND GRID ARRAYS (LGA);

MICROPROCESSOR CHIPS;

EID: 0035063030     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. A 600MHz superscalar RISC microprocessor with out-of-order execution
2. A 1GHz alpha microprocessor
3. Clocking design and analysis for a 600-MHz alpha microprocessor
4. The design and analysis of the clock distribution network for a 1.2GHz alpha microprocessor