Analysis of breakdown voltage and on resistance of super-junction power MOSFET CoolMOS™ using theory of novel voltage sustaining layer

PESC Record - IEEE Annual Power Electronics Specialists Conference

Volumn 4, Issue , 2002, Pages 1769-1778

  Kondekar, P N ^a   Parikh, C D ^a   Patil, M B ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY BOMBAY   (India)

Author keywords

Breakdown voltage; Charge imbalance; CoolMOS; Geometry factor; On resistance; Super junction devices

Indexed keywords

COMPUTER SIMULATION; ELECTRIC BREAKDOWN; ELECTRIC RESISTANCE; HETEROJUNCTIONS; INTEGRATED CIRCUIT LAYOUT; SEMICONDUCTING SILICON; SEMICONDUCTOR DOPING; THRESHOLD VOLTAGE;

CELL PITCH; CHARGE IMBALANCE; COOLMOS; GEOMETRY FACTOR; ON RESISTANCE; SUPER JUNCTION POWER;

MOSFET DEVICES;

EID: 0036443093     PISSN: 02759306     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

1. X. B. Chen and P. A. Mawby, "Theory of a novel voltage-sustaining layers for power devices", Microelectronic Journal, 1998, vol.29, pp. 1005-1011.
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3. B. J. Baliga, Modern Power Devices, John & Wiley Inc., 1987.
4. L. Lorenz, M. Mar, J.P Stencil and A. Bachofner, "Drastic Reduction of On-Resistance with CoolMOS", PCIM Europe, vol.5, 1998.
5. G. Deboy et al., "A new generation of high voltage MOSFETs breaks the limit of silicon", Proc. IEDM, p.683, 1998.
6. P. Shenoy, A. Bhalla and G. Dolny, "Analysis of the effect of charge imbalance on the static and dynamic characteristic of super junction MOSFET", Proc. ISPSD'98, pp. 99-102, 1999.
7. Integrated System Engineering, ISE-TCAD Manuals, AG, Zurich, Switzerland 1999