Media processing applications on the imagine stream processor

Proceedings-IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 2002, Pages 295-302

  Owens, John D ^a   Rixner, Scott ^b   Kapasi, Ujval J ^a   Mattson, Peter ^a   Towles, Brian ^a   Serebrin, Ben ^a   Dally, William J ^a  

^a STANFORD UNIVERSITY   (United States)

^b RICE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER SIMULATION; COMPUTER VISION; DYNAMIC RANDOM ACCESS STORAGE; IMAGE PROCESSING; STORAGE ALLOCATION (COMPUTER); VERY LONG INSTRUCTION WORD ARCHITECTURE;

IMAGINE STREAM PROCESSOR; MEDIA PROCESSING APPLICATIONS;

COMPUTER AIDED SOFTWARE ENGINEERING;

EID: 0036397054     PISSN: 10636404     EISSN: None     Source Type: Journal    
DOI: 10.1109/ICCD.2002.1106785     Document Type: Article

References (14)

1. Scott Rixner, William J. Dally, Ujval J. Kapasi, Brucek Khailany, Abelardo Lopez-Lagunas, Peter Mattson, and John D. Owens, "A bandwidth-efficient architecture for media processing," in Proceedings of the 31st Annual ACM/IEEE International Symposium on Microarchitecture, 1998, pp. 3-13.
2. Ujval J. Kapasi, Peter Mattson, William J. Dally, John D. Owens, and Brian Towles, "Stream scheduling," in Proceedings of the 3rd Workshop on Media and Streaming Processors, Dec. 2001, pp. 101-106.
3. Peter Mattson, William J. Dally, Scott Rixner, Ujval J. Kapasi, and John D. Owens, "Communication scheduling," in Proceedings of the Ninth International Conference on Architectural Support for Programming Languages and Operating Systems, 2000, pp. 82-92.
4. John D. Owens, William J. Dally, Ujval J. Kapasi, Scott Rixner, Peter Mattson, and Ben Mowery, "Polygon rendering on a stream architecture," in 2000 SIGGRAPH/Eurographics Workshop on Graphics Hardware, August 2000, pp. 23-32.
5. Brucek Khailany, William J. Dally, Scott Rixner, Ujval J. Kapasi, Peter Mattson, Jin Namkoong, John D. Owens, Brian Towles, and Andrew Chang, "Imagine: Media processing with streams," IEEE Micro, pp. 35-46, Mar/Apr 2001.
6. Peter Mattson, Programming System for the Imagine Media Processor, Ph.D. thesis, Stanford University, 2002.
7. Takeo Kanade, Atsushi Yoshida, Kazuo Oda, Hiroshi Kano, and Masaya Tanaka, "A stereo machine for video-rate dense depth mapping and its new applications," in Proceedings of the 15th Computer Vision and Pattern Recognition Conference, San Francisco, CA, June 18-20, 1996, pp. 196-202.
8. Jinwoo Suh and Stephen P. Crago, "PIM- and stream processor-based processing for radar signal applications," in Proceedings of the 3rd Workshop on Media and Streaming Processors, Dec. 2001, pp. 77-85.
9. John D. Owens, Brucek Khailany, Brian Towles, and William J. Dally, "Comparing Reyes and OpenGL on a stream architecture," in 2002 SIGGRAPH/Eurographics Workshop on Graphics Hardware, September 2002.
10. Kekoa Proudfoot, William R. Mark, Svetoslav Tzvetkov, and Pat Hanrahan, "A real-time procedural shading system for programmable graphics hardware," in Proceedings of ACM SIGGRAPH 2001, August 2001, pp. 159-170.
11. Timothy J. Purcell, Ian Buck, William R. Mark, and Pat Hanrahan, "Ray tracing on programmable graphics hardware," in Proceedings of ACM SIGGRAPH 2002, July 2002.
12. Scott Rixner, A Bandwidth-efficient Architecture for a Streaming Media Processor, Ph.D. thesis, Massachusetts Institute of Technology, February 2001.
13. Ujval J. Kapasi, William J. Dally, Scott Rixner, Peter R. Mattson, John D. Owens, and Brucek Khailany, "Efficient conditional operations for data-parallel architectures," in Proceedings of the 33rd Annual ACM/IEEE International Symposium on Microarchitecture, 2000, pp. 159-170.
14. Leslie Lamport, "The parallel execution of DO loops," Communications of the ACM, vol. 17, no. 2, pp. 83-93, Feb. 1974.