Constrained Clock Shifting for field programmable gate arrays

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn , Issue , 2002, Pages 121-126

  Singh, Deshanand P ^a   Brown, Stephen D ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER AIDED DESIGN; CONSTRAINT THEORY; INTEGER PROGRAMMING; INTERCONNECTION NETWORKS; OPTIMIZATION; TIMING CIRCUITS;

OPTIMAL CIRCUITS;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0036384095     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/503066.503067     Document Type: Conference Paper

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