FPGA-based radix-4 butterflies for HIPERLAN/2

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 3, Issue , 2002, Pages

  Perez Pascual A ^a   Sansaloni, T ^a   Valls, J ^a  

^a UNIVERSITAT POLITÈCNICA DE VALÈNCIA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BROADBAND NETWORKS; COMPUTER HARDWARE; DIGITAL ARITHMETIC; FAST FOURIER TRANSFORMS; LOCAL AREA NETWORKS; NUMBERING SYSTEMS; ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING; RANDOM ACCESS STORAGE; TABLE LOOKUP;

BLOCK RANDOM ACCESS STORAGE; BROADBAND RADIO ACCESS NETWORK; DISTRIBUTED ARITHMETIC; RADIX BUTTERFLIES; REDUNDANT NUMBER SYSTEM; SIGNED DIGIT CODE;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0036296679     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

1. Broadband radio access networks (BRAN); HIPERLAN type 2; physical layer
2. Digital filter for PCM encoded signals
3. A new hardware realization of digital filters
4. Signed-digit number representations for fast parallel arithmetic
5. On-line algorithms for complex number multipliers
6. FPGA based on-line complex number multiplier
7. Radix-4 on-line complex-number multiplier
8. On-line radix-2 butterflies on FPGA