A coefficient memory addressing scheme for VLSI implementation of FFT processors

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 4, Issue , 2002, Pages

  Hasan, M ^a   Arslan, T ^a  

^a UNIVERSITY OF EDINBURGH   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL METHODS; DATA STORAGE EQUIPMENT; FAST FOURIER TRANSFORMS; PROGRAM PROCESSORS;

FAST FOURIER TRANSFORM PROCESSORS; MEMORY ADDRESSING;

VLSI CIRCUITS;

EID: 0036293002     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. Simplified control of FFT hardware
2. A hardware efficient control of memory addressing for high performance FFT processors