Floating-gate low-voltage/low-power linear threshold element for neural computation

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 2002, Pages

  Aunet, Snorre ^a   Berg, Yngvar ^a   Saether, Trond ^a  

^a UNIVERSITY OF OSLO   (Norway)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; CARRY LOGIC; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; LOGIC CIRCUITS; MOSFET DEVICES; NEURAL NETWORKS; THRESHOLD ELEMENTS; THRESHOLD VOLTAGE;

FLOATING GATE CIRCUITS; NEURAL COMPUTATION;

INTEGRATED CIRCUIT LAYOUT;

EID: 0036292557     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (17)

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