Low cost floating-point unit design for audio applications

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 1, Issue , 2002, Pages

  Lee, Sung Won ^a   Park, In Cheol ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; AUDIO ACOUSTICS; CMOS INTEGRATED CIRCUITS; COMPUTER HARDWARE; COMPUTER SIMULATION; COMPUTER SOFTWARE; DIGITAL SIGNAL PROCESSING; LOGIC DESIGN;

CRITICAL PATH DELAY; INSTRUCTION DECODE; INSTRUCTION FETCH; LEADING ONE COUNTER; LEADING ZERO ANTICIPATOR; LEADING ZERO COUNTER; MANTISSA; OPERAND FETCH; VECTOR GENERATION;

DIGITAL ARITHMETIC;

EID: 0036287138     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

1. MPEG audio decoder for consumer applications
2. A full accuracy MPEG1 audio layer 3 (MP3) decoder with internal data converters
3. Single chip MPEG audio decoder
4. Use of short floating-point formats in audio applications
5. IEEE standard for binary floating-point arithmetic
6. Leading-zero anticipatory logic for high-speed floating point addition
7. 1GHz leading zero anticipator using independent sign-bit determination logic
8. A 13.3ns double-precision floating-point ALU and multiplier
9. Built-in self-test in a 24bit floating point digital processor
10. A cost-effective fixed/floating-point digital signal processor