Battery-efficient architecture for an 802.11 MAC processor

IEEE International Conference on Communications

Volumn 2, Issue , 2002, Pages 669-674

  Lahiri, Kanishka ^a   Raghunathan, Anand ^a   Dey, Sujit ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; ELECTRIC BATTERIES; NETWORK PROTOCOLS; TELECOMMUNICATION TRAFFIC;

MEDIUM ACCESS CONTROL (MAC) PROCESSOR; ON-CHIP BUS ARCHITECTURE;

WIRELESS TELECOMMUNICATION SYSTEMS;

EID: 0036283079     PISSN: 05361486     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (22)

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