Debugging hardware designs using a value-based model

Applied Intelligence

Volumn 16, Issue 1, 2002, Pages 71-92

  Wotawa, Franz ^a  

^a GRAZ UNIVERSITY OF TECHNOLOGY   (Austria)

Author keywords

Debugging of hardware designs; Model based reasoning; Software debugging

Indexed keywords

COMPUTER HARDWARE DESCRIPTION LANGUAGES; MATHEMATICAL MODELS; OPTIMIZATION; PROGRAM DEBUGGING; PROGRAM DIAGNOSTICS; SET THEORY;

REGISTER TRANSFER LEVEL (RTL) PROGRAMS;

COMPUTER AIDED LOGIC DESIGN;

EID: 0036170269     PISSN: 0924669X     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1012821511498     Document Type: Article

References (28)

1. Logic design error diagnosis and correction
2. Model-based diagnosis of hardware designs
3. VHDLDIAG+:Value-level diagnosis of VHDL programs
4. A theory of diagnosis from first principles
5. Diagnosing multiple faults
6. Physical negation-Integrating fault models into the general diagnostic engine
7. Characterizing diagnoses
8. A correction to the algorithm in Reiter's theory of diagnosis
9. A static model-based engine for model-based reasoning
10. Diagnosing tree-decomposable circuits
11. Diagnosing tree-structured systems
12. Current directions in automatic test-pattern generation
13. Diagnosing circuits with state-an inherently underconstrained problem
14. Debugging functional programs
15. No faults in structure? How to diagnose hidden interaction
16. Structure and chance: Melding logic and probability for software debugging
17. A synthesis of logical and probabilistic reasoning for program understanding and debugging
18. Model-based diagnosis meets error diagnosis in logic programs
19. Program slicing
20. Aspect: Detecting bugs with abstract dependences