Bias-stress-induced increase in parasitic resistance of InP-based InAlAs/InGaAs HEMTs

Microelectronics Reliability

Volumn 42, Issue 1, 2002, Pages 47-52

  Suemitsu, Tetsuya ^a   Fukai, Yoshino K ^a   Sugiyama, Hiroki ^a   Watanabe, Kazuo ^a   Yokoyama, Haruki ^a,b  

^a NTT CORPORATION   (Japan)

^b NTT Advance Technology Corporation   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

SEMICONDUCTING INDIUM PHOSPHIDE; SEMICONDUCTOR DOPING; STRESS ANALYSIS;

DRAIN RESISTANCE; GATE ELECTRODES;

HIGH ELECTRON MOBILITY TRANSISTORS;

EID: 0036133653     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2714(01)00215-3     Document Type: Article

References (9)

1. Reliability study of InAlAs/InGaAs HEMTs with a recess-etch stopper and refractory gate metal
2. Improvement of DC, low-frequency and reliability properties of InAlAs/InGaAs InP-based HEMTs by means of an InP etch stop layer
3. Hydrogen-induced piezoelec-tric effects in InP HEMTs
4. Thermal stability of AlInAs/GaInAs/InP heterostructure
5. Donor passivation in n-InAlAs layers by fluorine
6. InAlAs/InGaAs channel composition modulated transistors with InAs channel and AlAs/InAs superlattice barrier layer
7. InAlAs/pseudomorphic InGaAs/InP high electron mobility transistor with doped InAs/AlAs superlattice
8. The impact of using AlGaAs as a carrier supplying layer in an InAlAs/InGaAs high electron mobility transistor structure on thermal stability
9. A new technique for characterization of the end resistance in modulation-doped FET's