VLSI implementation of the multistage detector for next generation wideband CDMA receivers

Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology

Volumn 30, Issue 1-3, 2002, Pages 21-33

  Xu, Gang ^a   Rajagopal, Sridhar ^a   Cavallaro, Joseph R ^a   Aazhang, Behnaam ^a  

^a Rice University   (United States)

Author keywords

CDMA; Fixed point; Interference cancellation; Multistage detector; Multiuser detection; Real time implementation

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; DETECTORS; INTERFERENCE SUPPRESSION; PHASE SHIFT KEYING; SIGNAL RECEIVERS; SIGNAL TO NOISE RATIO; TELECOMMUNICATION LINKS; VLSI CIRCUITS;

MULTISTAGE DETECTORS;

CODE DIVISION MULTIPLE ACCESS;

EID: 0036121509     PISSN: 13875485     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1014086523082     Document Type: Article

References (16)

1. Multi-user detection for DS-CDMA communications
2. On-line arithmetic: An overview
3. Multistage detection in asynchronous code-division multiple-access communications
4. Improved parallel interference cancellation for CDMA
5. Pipelined digital differential matched filter FPGA implementation and VLSI design
6. CDMA mobile station modem ASIC
7. Low-power viterbi decoder for CDMA mobile terminals
8. Fixed point error analysis of multiuser detection and synchronization algorithms for cdma communication systems
9. Hardware design issues for a mobile unit for next generation CDMA systems
10. Fixed-point optimization utility for C and C++ based digital signal processing programs
11. Probability of error in MMSE multiuser detection
12. Real-time implementation of multi-stage algorithm for next generation wideband CDMA systems