A probabilistic neural network hardware system using a learning-parameter parallel architecture

Proceedings of the International Joint Conference on Neural Networks

Volumn 3, Issue , 2002, Pages 2270-2275

  Aibe, Noriyuki ^a   Yasunaga, Moritoshi ^a   Yoshihara, Ikuo ^a   Kim, Jung H ^a  

^a UNIVERSITY OF TSUKUBA   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; FIELD PROGRAMMABLE GATE ARRAYS; LEARNING SYSTEMS; OBJECT RECOGNITION; PARALLEL ALGORITHMS; PROBABILITY DENSITY FUNCTION;

HARDWARE PROTOTYPE; IMAGE RECOGNITION; PROBABILISTIC NEURAL NETWORK; SIGMA PARALLEL ARCHITECTURE;

FEEDFORWARD NEURAL NETWORKS;

EID: 0036080017     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

1. Probabilistic neural networks
2. Probabilistic neural networks and the polynomial adaline as complementary techniques for classification
3. Temporal updating scheme for probabilistic neural network with application to satellite cloud classification
4. Comparison of two different PNN training approaches for satellite cloud data classification
5. Probabilistic neural-network structure determination for pattern classification
6. A design for FPGA implementation of the probabilistic neural networks