A fast on-chip profiler memory

Proceedings - Design Automation Conference

Volumn , Issue , 2002, Pages 28-33

  Lysecky, Roman ^a   Cotterell, Susan ^a   Vahid, Frank ^a  

^a University of California Riverside   (United States)

Author keywords

Adaptive architectures; Binary tree; Embedded CAD; Embedded systems; Low power; Memory design; Platform tuning; Profiling; System on a chip

Indexed keywords

BUFFER STORAGE; COMPUTER AIDED DESIGN; EMBEDDED SYSTEMS; OPTIMIZATION; TREES (MATHEMATICS);

BINARY TREE STRUCTURE;

MICROPROCESSOR CHIPS;

EID: 0036054544     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/dac.2002.1012589     Document Type: Conference Paper

References (23)

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7. Performance analysis using the MIPS R10000 performance counters
8. System support for automatic profiling and optimization
9. A programmable co-processor for profiling