A highly manufacturable 110 nm DRAM technology with 8F2 vertical transistor cell for 1 Gb and beyond

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2002, Pages 52-53

  Akatsu, H ^a   Weis, R ^a   Cheng, K ^a   Seitz, M ^a   Kim, M S ^a   Ramachandran, R ^a   Dyer, T ^a   Kim, B ^a   Kim, D K ^a   Malik, R ^a   Strane, J ^a   Goebel, T ^a   Kwon, O J ^a   Sung, C Y ^a   Parkinson, P ^a   Wilson, K ^a   McStay, I ^a   Chudzik, M ^a   Dobuzinsky, D ^a   Jacunski, M ^a   Ransom, C ^a   Settlemyer, K ^a   Economikos, L ^a   Simpson, A ^a   Knorr, A ^a   Naeem, M ^a   Stojakovic, G ^a   Robl, W ^a   Gluschenkov, O ^a   Liegl, B ^a   Wu, C H ^a   Wu, Q ^a   Li, W K ^a   Choi, C J ^a   Arnold, N ^a   Joseph, T ^a   Varn, K ^a   Weybright, M ^a   McStay, K ^a   Kang, W T ^a   Li, Y ^a   Bukofsky, S ^a   Jammy, R ^a   Schutz, R ^a   Gutmann, A ^a   Bergner, W ^a   Divakaruni, R ^a   Back, D ^a   Crabbe, E ^a   Mueller, W ^a   Bronner, G ^a   more..

^a IBM MICROELECTRONICS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; DIELECTRIC MATERIALS; GATES (TRANSISTOR); LITHOGRAPHY; MICROPROCESSOR CHIPS; TUNGSTEN;

VERTICAL ARRAY TRANSISTORS;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 0036045245     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)