Coefficient memory addressing scheme for high performance FFT processors

Electronics Letters

Volumn 37, Issue 22, 2001, Pages 1322-1324

  Hasan, M ^a   Arslan, T ^a  

^a UNIVERSITY OF EDINBURGH   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

FAST FOURIER TRANSFORMS; FORMAL LOGIC; STORAGE ALLOCATION (COMPUTER); VLSI CIRCUITS;

FAST FOURIER TRANSFORM (FFT) PROCESSORS;

MICROPROCESSOR CHIPS;

EID: 0035950148     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20010912     Document Type: Article

References (4)

1. Low power design for DSP: Methodologies and techniques
2. Simplified control of FFT hardware
3. A hardware efficient control of memory addressing for high performance FFT processors