Deep levels reduction in (NH4)2S treated and annealed GaAs epilayer on Si substrate

Materials Science and Engineering: B

Volumn 84, Issue 3, 2001, Pages 195-199

  Saravanan, S ^a   Soga, T ^a   Jimbo, T ^a   Umeno, M ^a  

^a NAGOYA INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

(NH4)2S; DLTS; GaAs Si; I V; Passivation; PL; XPS

Indexed keywords

ANNEALING; DEEP LEVEL TRANSIENT SPECTROSCOPY; ELECTRONIC PROPERTIES; EPITAXIAL GROWTH; PASSIVATION; PHOTOLUMINESCENCE; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE STRUCTURES; SUBSTRATES; X RAY PHOTOELECTRON SPECTROSCOPY;

DEEP LEVELS REDUCTION;

SEMICONDUCTING GALLIUM ARSENIDE;

EID: 0035919950     PISSN: 09215107     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0921-5107(01)00564-5     Document Type: Article

References (15)