CMOS implementation of all-analogue APP decoders: Analysis of performances and limitations

Electronics Letters

Volumn 37, Issue 25, 2001, Pages 1501-1503

  Xotta, A ^a   Gerosa, A ^a   Neviani, A ^a  

^a UNIVERSITY OF PADOVA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BIPOLAR TRANSISTORS; BIT ERROR RATE; COMPUTER SIMULATION; CURRENT DENSITY; DECODING; MOS DEVICES; TRELLIS CODES; TURBO CODES;

TAIL-BITING DECODER;

CMOS INTEGRATED CIRCUITS;

EID: 0035818873     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20011025     Document Type: Article

References (5)

1. Near Shannon limit error-correcting coding and decoding: Turbo-codes
2. The analog decoder
3. Probability propagation and decoding in analog VLSI
4. All-analog decoder for a binary (18, 9, 5) tailbiting trellis code
5. Optimal decoding of linear codes for minimizing symbol error rate