Compression ratio and decompression overhead tradeoffs in code compression for VLIW architectures

International Conference on ASIC, Proceedings

Volumn , Issue , 2001, Pages 337-340

  Xie, Yuan ^a   Wolf, Wayne ^a   Lekatsas, Haris ^a  

^a Princeton University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BANDWIDTH; CODES (SYMBOLS); COMPUTER SIMULATION; DATA COMPRESSION; DIGITAL SIGNAL PROCESSING; EMBEDDED SYSTEMS; PROM; TUNING; VERY LONG INSTRUCTION WORD ARCHITECTURE;

ARITHMETIC CODING; CODE COMPRESSION; COMPRESSION RATIO; DECOMPRESSION OVERHEAD; PROGRAM MEMORY;

ENCODING (SYMBOLS);

EID: 0035719397     PISSN: None     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Conference Paper

References (10)

1. Code compression for embedded systems
2. Improving dictionary-based code compression in vliw architectures
3. Practical implementation of arithmetic coding
4. Text compression
5. A decompression core for power pc
6. Executing compressed programs on an embedded RISC architecture
7. Code compression for VLIW processors
8. A code decompression architecture for VLIW processors