Gate current: Modeling, ΔL extraction and impact on RF performance

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2001, Pages 289-292

  Van Langevelde, R ^a   Scholten, A J ^a   Duffy, R ^a   Cubaynes, F N ^a   Knitel, M J ^a   Klaassen, D B M ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; LEAKAGE CURRENTS; MATHEMATICAL MODELS;

GATE CURRENT; PARAMETER EXTRACTION;

GATES (TRANSISTOR);

EID: 0035718182     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (17)