Narrow distribution of threshold voltages in 4Mbit MONOS memory-cell arrays and its impact on cell operation

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2001, Pages 45-48

  Terano, T ^a   Moriya, H ^a   Nakamura, A ^a   Kosaka, H ^a   Hashiguchi, A ^a   Nomoto, K ^a   Fujiwara, I ^a   Kobayashi, T ^a  

^a Sony Corporation Semiconductor Network Company   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRON TUNNELING; EQUIVALENT CIRCUITS; FILMS; HEAT TREATMENT; NONVOLATILE STORAGE; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE TESTING; SILICON NITRIDE; THRESHOLD VOLTAGE; TRANSISTORS; TRANSMISSION ELECTRON MICROSCOPY;

FLOATING GATE; LOGIC TRANSISTOR; METAL-OXIDE-NITRIDE-OXIDE-SEMICONDUCTOR MEMORY CELL ARRAY; NON-VOLATILE MEMORY; SILICON NITRIDE FILM;

SEMICONDUCTOR STORAGE;

EID: 0035716641     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)