Noise performance and considerations for integrated RF/analog/mixed-signal design in a high-performance SiGe BiCMOS technology

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2001, Pages 495-498

  Greenberg, D ^a   Sweeney, S ^a   LaMothe, C ^a   Jenkins, K ^b   Friedman, D ^b   Martin, B ^a   Freeman, G ^a   Ahlgren, D ^a   Subbanna, S ^a   Joseph, A ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b IBM RESEARCH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; FIELD EFFECT TRANSISTORS; FREQUENCIES; INTEGRATED CIRCUIT MANUFACTURE; PERFORMANCE; SEMICONDUCTING SILICON COMPOUNDS; SPURIOUS SIGNAL NOISE;

INTEGRATED RF DESIGN; ISOLATION; MIXED SIGNAL DESIGN;

INTEGRATED CIRCUIT LAYOUT;

EID: 0035716094     PISSN: 01631918     EISSN: None     Source Type: Journal    
DOI: 10.1109/IEDM.2001.979553     Document Type: Article

References (4)

1. HBT low-noise performance in a 0.18 μm SiGe BiCMOS technology
2. max) HBT and ASIC-compatible CMOS using copper interconnect