메뉴 건너뛰기




Volumn 2, Issue , 2001, Pages 1215-1219

Dispatching heuristic for wafer fabrication

Author keywords

[No Author keywords available]

Indexed keywords

HEURISTIC METHODS; OPERATIONS RESEARCH; PRODUCTION CONTROL; SCHEDULING; SEMICONDUCTOR DEVICE MANUFACTURE; SILICON WAFERS;

EID: 0035705542     PISSN: 02750708     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (9)

References (18)
  • 1
    • 0008264656 scopus 로고    scopus 로고
    • Comparison of scheduling rules in a flow shop with multiple processors: A simulation
    • (1998) Simulation , vol.71 , Issue.5 , pp. 302-311
    • Brah, S.1    Wheeler, G.E.2
  • 15
    • 0025510925 scopus 로고
    • Scheduling networks of queues: Heavy traffic analysis of a two-station network with controllable inputs
    • (1990) Operations Research , vol.38 , Issue.6 , pp. 1065-1077
    • Wein, L.M.1
  • 18
    • 0026859187 scopus 로고
    • Scheduling networks of queues: Heavy traffic analysis of a multistation network with controllable inputs
    • (1992) Operations Research , vol.40 , Issue.2 , pp. 312-334
    • Wein, L.M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.