Design techniques of reducing chip area and highly integrated MMIC for W-band application

IEEE MTT-S International Microwave Symposium Digest

Volumn 1, Issue , 2001, Pages 2167-2170

  Mimino, Yutaka ^a   Nakamura, Kannichi ^a   Sakamoto, Kazuyuki ^a   Aoki, Yoshio ^a   Kuroda, Shigeru ^a   Tokumitsu, Tsuneo ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMOTIVE ENGINEERING; BROADBAND AMPLIFIERS; ELECTRIC IMPEDANCE; ELECTRIC NETWORK TOPOLOGY; HEAT RESISTANCE; HIGH ELECTRON MOBILITY TRANSISTORS; INSERTION LOSSES; MICROSTRIP LINES; MONOLITHIC MICROWAVE INTEGRATED CIRCUITS; PASSIVE NETWORKS; RADAR; SEMICONDUCTING GALLIUM ARSENIDE;

AUTOMOTIVE RADAR; CHIP REDUCTION; WIDEBAND AMPLIFIER;

INTEGRATED CIRCUIT LAYOUT;

EID: 0035686947     PISSN: 0149645X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. 60GHZ MMIC image-rejection downconverter using InGaP/InGaAs HEMT
2. A flip-chip MMIC design with coplanar waveguide transmission line
3. High gain-density K-band P-HEMT LNA MMIC for LMDS and satellite communication
4. Single chip 58 GHz radio relay front end