Substrate coupled noise reduction and active noise suppression circuits for mixed-signal system-on-a-chip designs

Midwest Symposium on Circuits and Systems

Volumn 1, Issue , 2001, Pages 154-157

  Chan, Henry H Y ^a   Zilic, Zeljko ^a  

^a MCGILL UNIVERSITY   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

ATTENUATION; CAPACITANCE; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC RESISTANCE; ELECTRONICS PACKAGING; FREQUENCIES; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; LOGIC GATES; SUBSTRATES;

ACTIVE NOISE SUPPRESSION CIRCUIT; CMOS ACTIVE SUPPRESSION CIRCUIT; CMOS LOGIC GATE; FREQUENCY SPECTRUM; SUB-NANOSECOND SWITCHING NOISE; SUBSTRATE COUPLING; SYSTEM-ON-A-CHIP;

INTERFERENCE SUPPRESSION;

EID: 0035574022     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. A negative feedback based substrate coupling noise reduction method
2. On-chip active guard band filters to suppress substrate-coupling noise in analog and digital mixed-signal integrated circuits
3. Active substrate noise suppression in mixed-signal circuits using on-chip driven guard rings
4. Analysis and solutions for switching noise coupling in mixed-signal ICs. Substrate noise reduction using active guard band filters in mixed-signal integrated circuits
5. Measurements and analyses of substrate noise waveform in mixed-signal IC environment