An accurate statistical yield model for CMOS current-steering D/A converters

Analog Integrated Circuits and Signal Processing

Volumn 29, Issue 3, 2001, Pages 173-180

  Bosch, A V D ^a   Steyaert, Michiel ^a   Sansen, Willy ^a  

^a UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

CMOS; D A converter; High accuracy

Indexed keywords

COMPUTER SIMULATION; DIGITAL TO ANALOG CONVERSION; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; MONTE CARLO METHODS; RESPONSE TIME (COMPUTER SYSTEMS); TRANSISTORS;

DIFFERENTIAL NONLINEARITY ERROR; INTEGRAL NONLINEARITY ERROR; LAKSHMIKUMAR APPROACH; SOFTWARE PACKAGE MATLAB; STATISTICAL YIELD MODEL; TRANSISTOR MISMATCH;

CMOS INTEGRATED CIRCUITS;

EID: 0035546434     PISSN: 09251030     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1011261330190     Document Type: Article

References (7)

1. High speed wideband DACs permit multicarrier cellular basestations
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6. A comment on: Characterization and modeling of mismatch in MOS transistors for precision analog design
7. A 12 bit intrinsic accuracy high speed CMOS DAC