Supplemental cryptographic hardware for smart cards

IEEE Micro

Volumn 21, Issue 6, 2001, Pages 26-35

  Trichina, Elena ^a   Bucci, Marco ^a   De Seta, Domenico ^a   Luzzi, Raimondo ^b  

^a Rome CryptoDesign Center   (Italy)

^b SAPIENZA UNIVERSITY OF ROME   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER OPERATING SYSTEMS; CRYPTOGRAPHY; DATA TRANSFER; INTERFACES (COMPUTER); MICROCOMPUTERS; MICROCONTROLLERS; RANDOM NUMBER GENERATION; SECURITY OF DATA;

CRYPTOGRAPHIC HARDWARE;

SMART CARDS;

EID: 0035517627     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/40.977755     Document Type: Article

References (10)

1. Differential power analysis
2. A noise-based IC random number generator for applications in cryptography
3. Design of reliable true random number generator for cryptographic applications
4. The Rijndael block cipher: AES proposal
5. Architectural optimization for a 1.82-Gbits/sec VLSI implementation of the AES Rijndael algorithm