Parameterized dataflow modeling for DSP systems

IEEE Transactions on Signal Processing

Volumn 49, Issue 10, 2001, Pages 2408-2421

  Bhattacharya, Bishnupriya ^b   Bhattacharyya, Shuvra S ^a,c  

^a IEEE   (United States)

^b CADENCE DESIGN SYSTEMS   (United States)

^c UNIVERSITY OF MARYLAND   (United States)

Author keywords

CAD tools; Dataflow modeling; Embedded systems; Reconfigurable design; Software synthesis

Indexed keywords

PARAMETERIZED DATAFLOW MODELS;

COMPUTATIONAL METHODS; COMPUTER AIDED DESIGN; COMPUTER AIDED SOFTWARE ENGINEERING; DATA FLOW ANALYSIS; EMBEDDED SYSTEMS; GRAPH THEORY; ITERATIVE METHODS; MATHEMATICAL MODELS; SEMANTICS; SYNCHRONIZATION;

DIGITAL SIGNAL PROCESSING;

EID: 0035485423     PISSN: 1053587X     EISSN: None     Source Type: Journal    
DOI: 10.1109/78.950795     Document Type: Article

References (29)

1. Data memory minimization for synchronous data flow graphs emulated on DSP-FPGA targets
2. Macro pipelining based scheduling on high performance heterogeneous multiprocessor systems
3. Parameterized dataflow modeling of DSP systems
4. Quasi-static scheduling of re-configurable dataflow graphs for DSP systems
5. Hardware/software co-synthesis of DSP systems
6. Software synthesis and code generation for DSP
7. Cyclostatic dataflow
8. Ptolemy: A framework for simulating and prototyping heterogeneous systems
9. Scheduling dynamic dataflow graphs with bounded memory using the token flow model
10. Heterogeneous modeling and simulation of embedded systems in El Greco
11. Unfolding and retiming data-flow DSP programs for RISC multiprocessor scheduling
12. DF*: An extension of synchronous dataflow with data dependency and nondeterminism
13. Hierarchical finite state machines with multiple concurrency models
14. A compiler for multiprocessor DSP implementation
15. Gabriel: A design environment for DSP
16. Pipeline interleaved programmable DSP's: Synchronous dataflow programming
17. Dynamic dataflow and control flow in high level DSP code synthesis
18. Static rate-optimal scheduling of iterative dataflow programs via optimum unfolding
19. Efficient dataflow representation of MPEG-1 audio (Layer III) decoder algorithm with controlled global states
20. Memory efficient synthesis from dataflow graphs
21. Optimum vectorization of scalable synchronous dataflow graphs
22. Fun-State-An internal representation for codesign
23. Fully static multiprocessor array realizability criteria for real-time recurrent DSP applications
24. Cyclodynamic dataflow
25. Evolutionary algorithms for the synthesis of embedded software