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Annales des Telecommunications/Annals of Telecommunications

Volumn 56, Issue 7-8, 2001, Pages 447-454

How we implemented block turbo codes?

(3) Kerouedan S a Adde, P a Pyndiah, R a

a ECOLE DES MINES DE NANTES (France)

Author keywords

ASIC; Block code; Circuit design; Circuit realization; Decoder; Decoding; Error correcting code; Turbo code

Indexed keywords

CIRCUIT REALIZATION; ERROR CORRECTING CODE; SOFT IN SOFT OUT ALGORITHM;

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; BLOCK CODES; COMPUTATIONAL COMPLEXITY; COMPUTER SIMULATION; DECODING; ERROR CORRECTION; FIELD PROGRAMMABLE GATE ARRAYS; INTEGRATED CIRCUIT LAYOUT;

TURBO CODES;

EID: 0035389012 PISSN: 00034347 EISSN: 19589395 Source Type: Journal
DOI: None Document Type: Article

Times cited : (6)

References (17)

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2
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3
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14
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15
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.