Design and performance of a product code turbo encoding-decoding prototype

Annales des Telecommunications/Annals of Telecommunications

Volumn 54, Issue 3, 1999, Pages 214-219

  Adde, Patrick ^a   Pyndiah, Ramesh ^a   Buda, Fabien ^b  

^a TECHNOPÔLE BREST IROISE   (France)

^b NOKIA RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BLOCK TURBO DECODERS; BCH CODE; CODER; DATA BLOCKS; DECODER; ERROR CORRECTING CODE; PERFORMANCE; PRODUCT CODE; PROTOTYPE; TURBO DECODERS; TURBO ENCODING;

ASYNCHRONOUS TRANSFER MODE; BIT ERROR RATE; COMMUNICATION CHANNELS (INFORMATION THEORY); DECODING; ENCODING (SYMBOLS); ERROR CORRECTION; FIELD PROGRAMMABLE GATE ARRAYS; SPURIOUS SIGNAL NOISE; WHITE NOISE; CHANNEL CODING; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); GAUSSIAN NOISE (ELECTRONIC);

BLOCK CODES; TURBO CODES;

EID: 0032643310     PISSN: 00034347     EISSN: 19589395     Source Type: Journal    
DOI: None     Document Type: Article

References (12)

1. BERROU (C.), GLAVIEUX (A.), THITIMAJSHIMA (P.). Near Shannon limit error-correcting coding and decoding : Turbo codes (1), IEEE Int. Conf. on Comm. ICC' 93, 2/3, pp. 1064-1071, (May 1993).
2. PYNDIAH (R.), GLAVIEUX (A.), Picart (A.), JACQ (S.). Near optimum decoding of product codes, in proc. of IEEE GLOBECOM '94 Conference, 1/3, San Francisco, pp. 339-343, (Nov.-Dec. 1994).
3. PYNDIAH (R.). Near optimum decoding of product codes : Block Turbo Codes, IEEE Trans. on Comm., 46, no 8, pp. 1003-1010, (Aug. 1998).
4. BAHL (L. R.), COCKE (J.), JELINEK (F.), RAVIV (J.). Optimal decoding of linear codes for minimizing symbol error rate. IEEE Trans. IT., pp. 284-287, (March 1974).
5. ELIAS (P.). Error-free coding, IRE Trans. on Inf. Theory. 4, pp. 29-37, (Sept. 1954).
6. PYNDIAH (R.). Iterative decoding of product codes : block turbo code, Int. Symposium on turbo codes and related topics, Brest, pp. 71-79, (Sept. 1997).
7. ADDE (P.), PYNDIAH (R.), RAOUL (O.). Performance and complexity of block turbo decoder circuits, Third International Conference on Electronics, Circuits and System ICECS'96, pp 172-175, Rodos, Greece, (13-16, Oct. 1996).
8. GOALIC (A.), PYNDIAH (R.). Real time turbo decoding of product codes on a digital signal processor, Int. Symposium on turbo codes and related topics, Brest, (Sept. 1997).
9. CHASE (D.). A class of algorithms for decoding block codes with channel measurement information, IEEE Trans. IT. 18, pp. 170-182, (Jan. 1972).
10. ADDE (P.), PYNDIAH (R.), RAOUL (O.), INISAN (J. R.). Block turbo decoder design, Int. Symposium on turbo codes and related topics, Brest, pp. 166-169, (Sept. 1997).
11. ADDE (P.), PYNDIAH (R.), INISAN (J. R.), SICHEZ (Y.), « Conception d'un turbo décodeur de code produit ». GRETSI'97, Grenoble, pp. 1169-1172, (Sept. 1997).
12. JÉZÉQUEL (M.), BERROU (C.), INISAN (J. R.), SICHEZ (Y.). Test of a turbo-encoder/decoder, Turbo Coding Seminar, Lund, Sweden. pp. 35-41, (128-29, Aug. 1996).