Quantitative study of the impact of design and synthesis options on processor core performance

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 9, Issue 3, 2001, Pages 461-473

  Bautista, T ^a   Nunez A ^a  

^a UNIVERSITY OF LAS PALMAS DE GRAN CANARIA   (Spain)

Author keywords

Circuit optimization; Circuit synthesis; Design methodology; Intellectual property (IP) based design; Layout; Microprocessors; Sensitivity; Systems on chip (SOC)

Indexed keywords

COMPUTER HARDWARE DESCRIPTION LANGUAGES; EMBEDDED SYSTEMS; INTELLECTUAL PROPERTY; MICROPROCESSOR CHIPS; OPTIMIZATION; SYSTEMS ANALYSIS;

DATAPATH GRANULARITY; SYSTEMS ON CHIP (SOC);

VLSI CIRCUITS;

EID: 0035361796     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.929580     Document Type: Article

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