Die stress drift measurement in IC plastic packages using the piezo-Hall effect

Microelectronics Reliability

Volumn 41, Issue 5, 2001, Pages 767-771

  Manic, D ^a,c   Petr, J ^b   Popovic, R S ^a  

^a EPFL   (Switzerland)

^b Siemens Schweiz AG   (Switzerland)

^c Xemics SA   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONICS PACKAGING; ENCAPSULATION; HALL EFFECT; STRESS ANALYSIS; STRESS RELAXATION; THERMAL CYCLING;

DIE STRESS DRIFT MEASUREMENTS; PIEZO-HALL EFFECTS;

INTEGRATED CIRCUITS;

EID: 0035340235     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2714(01)00010-5     Document Type: Article

References (8)

1. Thermal stress measurement in silicon chips in IC plastic packages under temperature cycling
2. A graphical representation of the piezoresistance coefficients in silicon
3. A new aspect of mechanical stress effect in scaled MOS devices
4. Effects of stress on germanium and silicon P-N junctions
5. Piezo-Hall coefficients of n-type silicon
6. Three-dimensional die surface stress measurements in delaminated and non-delaminated plastic packages