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Volumn 11, Issue 1 I, 2001, Pages 1078-1081

Improved methods for yield-optimization of digital logic

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER SIMULATION; LOGIC CIRCUITS; OPTIMIZATION; SUPERCONDUCTING MATERIALS;

EID: 0035268523     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/77.919534     Document Type: Conference Paper
Times cited : (5)

References (8)
  • 8
    • 0004886958 scopus 로고
    • LMeter: Inductance calculation for superconductive layouts
    • (1994)
    • Bunyk, P.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.