Fabrication technologies for doubIe-SiO2-barrier metal-oxide-semiconductor transistor with a poly-Si dot

Japanese Journal of Applied Physics, Part 2: Letters

Volumn 40, Issue 3 B, 2001, Pages 2017-2020

  Hatano, Tsuyoshi ^a   Ito, Yuhei ^a   Nakajima, Ann ^a   Yokoyama, Shin ^a  

^a HIROSHIMA UNIVERSITY   (Japan)

Author keywords

Double tunnel barrier; Electron beam lithography; MOS FET; Plasma induced damage; Poly si dot; Sacrificial oxidation

Indexed keywords

COMPUTER SIMULATION; ELECTRIC PROPERTIES; ELECTRON BEAM LITHOGRAPHY; PLASMAS; POLYSILICON; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MANUFACTURE; SILICA; TECHNOLOGY TRANSFER;

DOUBLE TUNNEL BARRIERS; PLASMA INDUCED DAMAGE; SINGLE-ELECTRON SET (SET);

MOS DEVICES;

EID: 0035267468     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/jjap.40.2017     Document Type: Article

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