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Volumn 26, Issue 2, 2001, Pages 125-128

Low-voltage analog tripler circuit

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC POTENTIAL; INTEGRATED CIRCUIT MANUFACTURE; MOSFET DEVICES; NUMERICAL METHODS; SIGNAL PROCESSING; TRANSCONDUCTANCE;

EID: 0035249096     PISSN: 09251030     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1011238132614     Document Type: Article
Times cited : (2)

References (12)
  • 2
    • 0024479756 scopus 로고
    • Introduction to implantable biomedical IC design
    • Stotts, L. J., "Introduction to implantable biomedical IC design." IEEE Circuits and Devices Mag., pp. 12-18, 1989.
    • (1989) IEEE Circuits and Devices Mag. , pp. 12-18
    • Stotts, L.J.1
  • 3
    • 0022733061 scopus 로고
    • A class of analog CMOS circuits based on the square-law characteristics of an MOS transistor in saturation
    • June
    • Bult, K. and Wallinga, H., "A class of analog CMOS circuits based on the square-law characteristics of an MOS transistor in saturation." IEEE J. Solid-State Circuits, SC-22, pp. 357-364, June 1987.
    • (1987) IEEE J. Solid-State Circuits , vol.SC-22 , pp. 357-364
    • Bult, K.1    Wallinga, H.2
  • 4
    • 0022737957 scopus 로고
    • A versatile CMOS linear transconductor/squarelaw function circuit
    • June
    • Seevinck, E. and Wassenaar, R. F., "A versatile CMOS linear transconductor/squarelaw function circuit." IEEE J. Solid-State Circuits, SC-22, pp. 366-377, June 1987.
    • (1987) IEEE J. Solid-State Circuits , vol.SC-22 , pp. 366-377
    • Seevinck, E.1    Wassenaar, R.F.2
  • 6
    • 0019597235 scopus 로고
    • A three-level broad-banded monolithic analog multiplier
    • Aug.
    • Choma, J., Jr., "A three-level broad-banded monolithic analog multiplier." IEEE J. Solid-State Circuits, SC-16, pp. 392-399, Aug. 1981.
    • (1981) IEEE J. Solid-State Circuits , vol.SC-16 , pp. 392-399
    • Choma J., Jr.1
  • 10
    • 0029632439 scopus 로고
    • CMOS analog adder
    • Chaoui, H., "CMOS analog adder." Electronics Letters, 31, pp. 180-181, 1995.
    • (1995) Electronics Letters , vol.31 , pp. 180-181
    • Chaoui, H.1
  • 11
    • 0023536915 scopus 로고
    • A MOS four-quadrant analog multiplier using the quarter-square technique
    • Dec.
    • Pena-Finol, J. and Connelly, J. A., "A MOS four-quadrant analog multiplier using the quarter-square technique." IEEE J. Solid-State Circuits, SC-22, pp. 1064-1073, Dec. 1987.
    • (1987) IEEE J. Solid-State Circuits , vol.SC-22 , pp. 1064-1073
    • Pena-Finol, J.1    Connelly, J.A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.