Closing the gap between analog and digital testing

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 20, Issue 2, 2001, Pages 307-314

  Saab, Khaled ^b   Hamida, Naim Ben ^c   Kaminska, Bozena ^a,d  

^a IEEE

^b Adaptive Networks Inc   (United States)

^c NORTEL NETWORKS   (Canada)

^d Fluence Technology   (United States)

Author keywords

Analog and mixed circuits; Fault modeling; Hard faults testing; Parallel fault simulation; Test vector generation

Indexed keywords

APPROXIMATION THEORY; COMPUTER SIMULATION; FAULT TREE ANALYSIS; INTEGRATED CIRCUIT TESTING; MATHEMATICAL MODELS; MIXER CIRCUITS; SPECIFICATIONS; STATISTICAL METHODS; TRANSISTORS;

LINEAR APPROXIMATION; PARALLEL HARD FAULT SIMULATION; PARAMETER DISTRIBUTION; PARAMETRIC FAULT TESTING; STUCK-AT FAULT MODEL; TEST VECTOR GENERATION;

DIGITAL CIRCUITS;

EID: 0035248405     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.908473     Document Type: Article

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