Reducing power consumption of turbo-code decoder using adaptive iteration with variable supply voltage

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 9, Issue 1, 2001, Pages 34-41

  Leung, Oliver Yuk Hang ^a   Tsui, Chi Ying ^a   Cheng, Roger Shu Kwan ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

Communication; Digital; Low power design; System level; VLSI

Indexed keywords

ADAPTIVE ALGORITHMS; COMPUTATIONAL COMPLEXITY; COMPUTER SIMULATION; CONVERGENCE OF NUMERICAL METHODS; DECODING; ELECTRIC POWER SUPPLIES TO APPARATUS; HEURISTIC METHODS; ITERATIVE METHODS; POWER CONTROL; SIGNAL RECEIVERS; TURBO CODES; WIRELESS TELECOMMUNICATION SYSTEMS;

CYCLIC REDUNDANCY CHECKING; HEURISTIC ALGORITHMS; MAXIMUM A POSTERIORI DECODING; SOFT OUTPUT VITERBI ALGORITHM; TURBO CODE DECODER;

VLSI CIRCUITS;

EID: 0035242927     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.920817     Document Type: Article

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