Pre-routing estimation of shielding for RLC signal integrity

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 2001, Pages 553-556

  Ma, James D Z ^a   Parihar, Arvind ^a   Hc, Lei ^a  

^a UNIVERSITY OF WISCONSIN MADISON   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CONGESTION CONTROL (COMMUNICATION); ERRORS; MATHEMATICAL MODELS; PROBLEM SOLVING; ROUTERS;

CONGESTION ESTIMATION;

INTERCONNECTION NETWORKS;

EID: 0035183736     PISSN: 10636404     EISSN: None     Source Type: Journal    
DOI: 10.1109/ICCD.2001.955090     Document Type: Article

References (8)

1. High-performance muting trees with identified critical sinks
2. Optimal wiresizing for interconnects with multiple sources
3. An efficient inductance modeling for on-chip interconnects
4. Simultaneous shield insertion and net ordering for capacitive and inductive coupling minimization
5. Simultaneous shield insertion and net ordering for coupled rlc nets under explicit noise constraint
6. eff model
7. Formulae and applications of interconnect estimation considering shield insertion and net ordering
8. Equivalent circuit models for three-dimensional multiconductor systems