Architectural enhancements for fast subword permutations with repetitions in cryptographic applications

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 2001, Pages 453-461

  McGregor, J P ^a   Lee, R B ^a  

^a Princeton University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMBINATORIAL MATHEMATICS; COMPUTER SIMULATION; MICROPROCESSOR CHIPS; SET THEORY;

PERMUTATIONS; SUPERSCALAR PROCESSORS;

SECURITY OF DATA;

EID: 0035183408     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (19)

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