The adaptive bubble router

Journal of Parallel and Distributed Computing

Volumn 61, Issue 9, 2001, Pages 1180-1208

  Puente, V ^a   Izu, C ^b   Beivide, R ^a   Gregorio, J A ^a   Vallejo, F ^a   Prellezo, J M ^a  

^a UNIVERSITY OF CANTABRIA   (Spain)

^b UNIVERSITY OF ADELAIDE   (Australia)

Author keywords

cc NUMA systems; Crossbar arbitration; Hardware routers; Interconnection subsystem; Packet deadlock; Parallel application benchmarks; Performance evaluation; VLSI design

Indexed keywords

EID: 0035180696     PISSN: 07437315     EISSN: None     Source Type: Journal    
DOI: 10.1006/jpdc.2001.1746     Document Type: Article

References (31)

1. Limits on interconnection network performance
2. Alpha 21364 to ease memory bottleneck
3. Cavallino: The teraflops router and NIC
4. A flow control mechanism to avoid message deadlock in k-ary n-cube networks
5. A cost and speed model for k-ary n-cube wormhole routers
6. Planar-adaptive routing: Low-cost adaptive network for multiprocessors
7. The torus routing chip
8. Deadlock-free message routing in multiprocessor interconnection networks
9. Performance analysis of k-ary n-cube interconnection networks
10. A new theory of deadlock-free adaptive routing in wormhole networks
11. Performance of adaptive routing algorithms k-ary n-cubes
12. A necessary and sufficient condition for deadlock-free routing in cut-through and store-and-forward networks
13. Scalable pipelined interconnect for distributed endpoint routing: The SPIDER chip
14. The turn model for adaptive routing
15. Restricted injection flow control for k-ary n-cube networks
16. Virtual cut-through: A new computer communication switching technique
17. Creating simulation capabilities
18. The SGI Origin: A cc-NUMA highly scalable server
19. An adaptive and fault tolerant wormhole routing strategy for k-ary n-cubes
20. Rsim: An execution-driven simulator for ILP-based shared-memory multiprocessors and uniprocessors
21. Minimal adaptive routing with limited injection on toroidal k-ary n-cubes
22. On deadlocks in interconnection networks
23. Low-level router design and its impact on supercomputer system performance
24. Adaptive bubble router: A design to balance latency and throughout in networks for parallel computers
25. The Cray T3E network: Adaptive routing in a high performance 3-D torus
26. Symmetric crossbar arbiters for VLSI communication switches
27. The SPLASH-2 Programs: Characterization and methodological considerations