Low-level router design and its impact on supercomputer system performance

Proceedings of the International Conference on Supercomputing

Volumn , Issue , 1999, Pages 193-201

  Puente, V ^a   Gregorio, J A ^a   Izu, C ^a   Beivide, R ^a   Vallejo, F ^a  

^a UNIVERSITY OF CANTABRIA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER SIMULATION; INTERCONNECTION NETWORKS; PARALLEL PROCESSING SYSTEMS; RESPONSE TIME (COMPUTER SYSTEMS); ROUTERS; VLSI CIRCUITS;

DISTRIBUTED SHARED-MEMORY MULTIPROCESSORS (DSM);

SUPERCOMPUTERS;

EID: 0032659289     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/305138.305193     Document Type: Article

References (25)