Cache-friendly implementations of transitive closure

Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

Volumn , Issue , 2001, Pages 185-196

  Penner, M ^a   Prasanna, V K ^a  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; OPTIMIZATION; PROGRAM COMPILERS; SYSTOLIC ARRAYS;

UNIDIRECTIONAL SPACE TIME REPRESENTATIONS;

CACHE MEMORY;

EID: 0035177611     PISSN: 1089795X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (21)

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13. Automatically tuned linear algebra software