Memory power reduction for the high-speed implementation of turbo codes

IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation

Volumn , Issue , 2001, Pages 16-24

  Maessen, F ^a   Giulietti, A ^a   Bougard, B ^a   Derudder, V ^a   Van Der Perre, L ^a   Catthoor, F ^a   Engels, M ^a  

^a IMEC   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; DATA TRANSFER; DECODING; ERROR CORRECTION; MOBILE TELECOMMUNICATION SYSTEMS; SIGNAL ENCODING; STORAGE ALLOCATION (COMPUTER); WIRELESS TELECOMMUNICATION SYSTEMS;

HIGH SPEED NETWORKS; MAXIMUM A POSTERIORI ALGORITHM; MEMORY POWER REDUCTION; MOBILE INTERACTIVE SYSTEMS;

TURBO CODES;

EID: 0035155102     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)

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