On-chip 96.5% current efficiency CMOS linear regulator using a flexible control technique of output current

IEEE Journal of Solid-State Circuits

Volumn 36, Issue 1, 2001, Pages 34-39

  Endoh, Tetsuo ^a   Sunaga, Kazuhisa ^a   Sakuraba, Hiroshi ^a   Masuoka, Fujio ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; LSI CIRCUITS; PULSE WIDTH MODULATION; VOLTAGE MEASUREMENT;

FLEXIBLE CONTROL TECHNIQUES; LINEAR REGULATORS;

ELECTRIC CURRENT REGULATORS;

EID: 0035118439     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.896226     Document Type: Article

References (5)

1. W. Namgoong et al., "A high-efficiency variable-voltage CMOS dynamic dc-dc switching regulator," in ISSCC Dig., 1997, pp. 380-381.
2. S. Sakiyama, J. Kajiwara, M. Kinoshita, K. Satomi, K. Ohtani, and A. Matsuzawa, "An on-chip high-efficiency and low-noise dc/dc converter using divided switches with current control technique," in ISSCC Dig., 1999, pp. 156-157.
3. T. Endoh, K. Nakamura, and F. Masuoka, "A new voltage downconverter (VDC) with low ratio of consuming current to load current for ULSI," IEICE Trans. Electron., vol. J80-C, no. 3, pp. 117-118, Mar. 1997.
4. _, "Evaluation of the voltage down converter (VDC) with low ratio of consuming current to load current in dc/ac operation mode," IEICE Trans. Electron., vol. E81-C, no. 6, pp. 968-974, June 1998.
5. _, "A high-performance voltage down converter (VDC) using new flexible control technology of driving current," IEICE Trans. Electron., vol. E81-C, no. 12, pp. 1905-1912, Dec. 1998.