A 3-D thermal simulation tool for integrated devices - Atar

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 20, Issue 1, 2001, Pages 105-115

  Smy, T ^b   Walkey, D ^a,b   Dew, S K ^a,c  

^a IEEE

^b CARLETON UNIVERSITY   (Canada)

^c UNIVERSITY OF ALBERTA   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COMPUTER SIMULATION; DIFFERENTIAL EQUATIONS; ELECTRIC RESISTANCE; HEAT CONDUCTION; MATRIX ALGEBRA; SEMICONDUCTING GALLIUM ARSENIDE; SEMICONDUCTOR DEVICE MODELS; SILICON ON INSULATOR TECHNOLOGY; THERMAL CONDUCTIVITY OF SOLIDS;

THERMAL SIMULAION TOOLS; TRANSMISSION LINE MATRIX (TLM);

INTEGRATED CIRCUIT TESTING;

EID: 0035057299     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.905679     Document Type: Article

References (9)

1. Thermal properties of very fast transistors
2. Thermal design studies of high-power hetrojunction bipolar transistors
3. Thermal behavior depending on emitter finger and substrate configurations in power hetrojunction bipolar transistors
4. Two-dimensional numerical analysis of A1-GaAs/GAAS hetrojunction bipolar transistors including the effects of graded layer, setback layer, and self-heating
5. Thermal management of microwave power hetrojunction bipolar devices
6. Use of three-dimensional TLM method in the thermal simulation and design of semiconductor devices
7. Transient 3-D heat flow analysis for integrated circuit devices using the transmission line matrix method on a quad-tree mesh