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Volumn 20, Issue 1, 2001, Pages 22-38

CMOS op-amp sizing using a geometric programming formulation

Author keywords

Cell generation; Device models; Optimization; Transistor sizing; VLSI

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; MATHEMATICAL PROGRAMMING; MOSFET DEVICES; SEMICONDUCTOR DEVICE MODELS;

EID: 0035057265     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.905672     Document Type: Article
Times cited : (159)

References (37)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.